Verilog strings

Submitted by wkaczurba on Mon, 05/14/2012 - 05:58

Displaying strings in Verilog is relatively easy;
This can be done by proper declaration of reg; e.g.:

  reg [10*7:0] status; // 10 bytes

Once this is done - you can assign any string value:

  status="NOP";

Have a look how does it look like on the GTKWave or in Modelsim:

And this is a full code you can try;
the zipped file is on the bottom that goes with Makefile for iverilog.

module tb;
 
  reg clk;
  reg reset;
 
  /* HELPING VARIABLES */
  reg [11:0] i;
 
  /* INSTRUCTIONS + OPCODES */
  parameter RST_OPC=18'b00_0000_0000_1111_1111; // [7:0] == INST; [17:8] == ADDR;
  parameter INOP=8'b0000_0000; // INOP = Nop
  parameter ILD =8'b0000_0001; // ILD = Load
  parameter IST =8'b0000_0010; // ILD = Store
  parameter IADD=8'b0000_0011; // IADD = Add
 
  parameter IJMP=8'b1111_1111;
 
  /* FSM1 */
  reg [9:0] ins_pc;
  reg [17:0] ins_dat[2047:0]; // [0:7]=INSTRUCTION;[8:17] BRANCH
  wire [17:0] cur_ins_dat; // current_ins_dat;
  reg [10*7:0] status;
  reg pc_en;
 
  assign cur_ins_dat = ins_dat[ins_pc];
 
  // Program counter allowing for jumping
  always @(posedge clk)
    if (reset)
      ins_pc <= 18'b0;
    else
      begin
        if (ins_dat[ins_pc][7:0] == IJMP) // JUMP
          ins_pc <= ins_dat[ins_pc][17:8];
        else
          ins_pc <= ins_pc + 1;
      end
 
always @*
    case (ins_dat[ins_pc][7:0])
      INOP:
          status="NOP";
      ILD: 
          status="LOAD";
      IST:
          status="STORE";
      IADD:
          status="ADD";
      IJMP:
          status="JMP";
      default:
          status = status;
    endcase
 
  initial begin
    clk = 1'b0;
    reset = 1'b0;
    ins_pc = 0;
    pc_en = 0; // enable_program_counter
    status="NONE";
 
    /* Zeroing everything */
    for (i=12'b0; i<12'b1111_1111_1111; i=i+1'b1)
      ins_dat[i] = {10'b0, INOP};
      $monitor(i);
 
    $display("Init");
 
    ins_dat[3] = {10'd5, IJMP}; //JMP to 0x05
    ins_dat[4] = {10'b0, INOP};
    ins_dat[5] = {10'b0, ILD};
    ins_dat[6] = {10'b0, IADD};
    ins_dat[7] = {10'b0, IST};
    ins_dat[10]= {10'd6, IJMP}; //JMP TO 0x06
 
    $dumpfile("tb");
    $dumpvars;
 
    #10 reset = 1'b1; 
    #10 reset = 1'b0; pc_en = 1;
 
    #10000 $finish;
  end
 
  always @*
    #5 clk <= !clk;
 
endmodule